Qualcomm, a leading technology innovator, is seeking a Senior DFT (Design for Test) Engineer to join their team in Santa Clara. This role is crucial for their ground-up implementation of a new chip architecture, offering a unique opportunity to influence design from the start. As a DFT Engineer, you'll collaborate with chip architects, designers, implementation engineers, and test engineers to verify DFT and DFD architecture, implementation, and test plans for both mixed signal and digital VLSI designs.
The ideal candidate will bring strong expertise in digital ASIC design, with practical experience in test/DFT and proficiency with tools like Mentor Tessent. You'll need solid programming skills in TCL, Perl/Python, and Shell scripting, along with deep knowledge of DFT techniques including JTAG, ATPG, test pattern translation, and various testing methodologies.
This role offers the exciting opportunity to work on cutting-edge technology at Qualcomm, a company known for pushing the boundaries of what's possible in digital transformation. You'll be instrumental in ensuring the quality and testability of complex chip designs, working with state-of-the-art tools and methodologies.
The position requires a blend of technical expertise, problem-solving skills, and the ability to work effectively with cross-functional teams. You'll have the chance to impact the future of chip design while working for a global leader in semiconductor technology. If you're passionate about hardware design, testing, and innovation, this role offers an excellent opportunity to advance your career in a dynamic, forward-thinking environment.