CPU Physical Design Engineer
Description For CPU Physical Design Engineer
Qualcomm, a leading technology innovator, is seeking a CPU Physical Design Engineer to join their team in Hyderabad, India. This role is part of their Hardware Engineering group, focusing on developing cutting-edge Snapdragon CPU designs for Mobile, Compute, and IOT markets in sub-10nm process technology.
The position requires expertise in ASIC design implementation, with a strong focus on Place and Route Implementation, Timing Closure, and Power Analysis. You'll be working with state-of-the-art tools and technologies, collaborating with cross-functional teams to optimize Performance, Power, and Area (PPA) metrics for high-performance computing systems.
As a CPU Physical Design Engineer, you'll be responsible for developing and implementing complex design solutions, working with RTL design, Synthesis, and various other teams to ensure optimal performance. The role requires strong technical skills in tools like Primetime, Tempus, and programming languages including Python, Perl/Tcl, and C++.
Qualcomm offers an excellent career growth environment with comprehensive benefits including world-class health coverage, financial planning support, and wellbeing programs. The company promotes continuous learning through tuition reimbursement and mentorship programs, making it an ideal place for professional development.
The position offers the opportunity to work on next-generation technology that impacts global markets, while being part of a team that pushes the boundaries of what's possible in mobile and computing technology. If you're passionate about hardware design and want to be at the forefront of technological innovation, this role provides an excellent opportunity to contribute to world-changing innovations.
Responsibilities For CPU Physical Design Engineer
- Participate in ASIC development with emphasis in Place and Route Implementation
- Create design experiments and conduct PPA comparison analysis
- Work with RTL design, Synthesis, low power, Thermal, Power analysis teams
- Develop Place & Route recipes for optimal PPA
- Timing Closure, Low Power, Power Analysis and Physical Verification
Requirements For CPU Physical Design Engineer
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field
- 2+ years of High Performance core Place & Route and ASIC design Implementation work experience
- Extensive experience in Place & Route with FC or Innovus
- Experience with STA using Primetime and/or Tempus
- Proficient in constraint generation and validation
- Experience of multiple power domain implementation
- Perl/Tcl, Python, C++ skills
- Strong problem solving and ASIC development/debugging skills
Benefits For CPU Physical Design Engineer
- World-class health coverage for employees and dependents
- Financial planning and future security programs
- Emotional/mental strength and resilience support
- Wellbeing programs
- Continuous learning and development programs
- Tuition reimbursement
- Mentorship programs
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