CPU RTL Power management Design Engineer-Sr Lead/Staff/Sr Staff

Qualcomm is seeking a talented CPU RTL Power Management Design Engineer to join their team in Bangalore. This role sits at the intersection of hardware engineering and power optimization, focusing on developing high-performance, low-power CPU solutions. The position offers an opportunity to work with cutting-edge technology and contribute to foundational CPU architecture development.

The role involves collaborating with chip architects on microarchitecture conception and product definition from early stages. Key responsibilities include exploring performance strategies, developing detailed specifications, and implementing RTL designs that meet strict power, performance, and area requirements. The successful candidate will work extensively on power management features including DVFS, idle power management, and clock management systems.

This is an excellent opportunity for experienced engineers passionate about CPU design and power optimization. The position offers comprehensive benefits including health coverage, financial planning support, and professional development opportunities through mentorship and tuition reimbursement. Qualcomm's collaborative environment enables working alongside industry experts while contributing to world-changing innovations in mobile and wireless technology.

The ideal candidate should possess strong knowledge of microprocessor architecture, experience with hardware description languages like Verilog, and understanding of low-power design techniques. This role requires both technical expertise and the ability to work effectively with cross-functional teams to deliver complex CPU designs.