DSP Low power design engineer- Sr

Qualcomm is a global technology leader that designs and creates breakthrough wireless technologies and semiconductors.
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Senior Software Engineer
In-Person
5,000+ Employees
2+ years of experience
AI · Hardware

Description For DSP Low power design engineer- Sr

Qualcomm India Private Limited is seeking a Senior DSP Low Power Design Engineer to join their Hardware Engineering team in Bangalore. This role focuses on power optimization and design for Qualcomm's DSP IPs, combining hardware engineering expertise with power management solutions.

The position requires deep expertise in power specification development, UPF-based power intent implementation, and validation across RTL and gate levels. You'll be responsible for critical power-related projections, debugging, and optimization while collaborating with cross-functional teams including SOC and Sub System teams.

This is an excellent opportunity for experienced hardware engineers passionate about power optimization in complex semiconductor designs. The role offers exposure to cutting-edge DSP technology and the chance to work with industry-leading experts at Qualcomm, a global leader in wireless technology innovation.

Qualcomm provides comprehensive benefits including world-class health coverage, financial planning support, continuous learning opportunities, and wellbeing programs. The company fosters an inclusive culture that encourages innovation and professional growth through mentorship and development programs.

The ideal candidate will have at least a bachelor's degree in Computer Science or Electrical/Electronics Engineering with 2+ years of relevant experience, or equivalent advanced degrees. They should be comfortable with power specification, UPF, RTL validation, and cross-team collaboration in a fast-paced semiconductor development environment.

Last updated 11 hours ago

Responsibilities For DSP Low power design engineer- Sr

  • Creating power spec for Qualcomm DSP IPs based on the design spec
  • Power intent development using UPF for DSP IPs based on power spec
  • Power intent validation at RTL level, Gate level using CLP
  • Fixing power intent based on PA DV feedback
  • Debugging issues related to MV cell insertion during synthesis
  • Dynamic and Leakage power projection of DSP IPs
  • Dynamic and Leakage power number generation using PTPX
  • Working with cross function teams for smooth handoff of power intent

Requirements For DSP Low power design engineer- Sr

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering or related field and 2+ years of Hardware Engineering experience
  • OR Master's degree in Computer Science, Electrical/Electronics Engineering or related field and 1+ year of Hardware Engineering experience
  • OR PhD in Computer Science, Electrical/Electronics Engineering or related field

Benefits For DSP Low power design engineer- Sr

Medical Insurance
401k
Education Budget
Mental Health Assistance
  • World-class health coverage for employees and dependents
  • Financial planning and security programs
  • Emotional/mental strength and resilience support
  • Comprehensive wellbeing programs
  • Tuition reimbursement
  • Mentorship programs
  • Continuous learning and development programs

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