DSP / NPU Design Verification Sr lead Engineer

One of the largest fabless semiconductor design companies in the world, generating over $35 Billion in annual revenues from chipsets and royalties from intellectual property.
Embedded
Senior Software Engineer
In-Person
5,000+ Employees
5+ years of experience
AI · Automotive

Description For DSP / NPU Design Verification Sr lead Engineer

Qualcomm is seeking a Senior Lead Engineer for DSP/NPU Design Verification to join their team in Bangalore. This role is part of the DSP team responsible for delivering high-performance DSP/NPU cores that are central to Qualcomm's multi-tier SoC roadmap for mobile, AI, and Automotive applications. The position requires 5-8 years of experience in design verification of complex proprietary DSP/NPU IP.

As a Sr Lead Engineer, you'll be working with a global DSP design team, driving verification efforts across architecture, implementation, power, post-silicon, and back-end teams. You'll be responsible for implementing System Verilog/UVM Testbench Architecture, developing verification methodologies, and ensuring high-quality commercial success of products.

The role involves hands-on work with various verification tools including assertions, formal verification, HW-SW co-verification, and simulation acceleration. You'll be responsible for gate-level simulation bring-up, power-aware verification, and working with advanced verification techniques.

Qualcomm offers comprehensive benefits including world-class health coverage, financial planning programs, emotional/mental health support, and continuous learning opportunities. The company's culture promotes innovation and collaboration, working alongside some of the industry's leading engineering and technology experts.

This is an excellent opportunity for someone passionate about processor architecture and verification, offering the chance to work on cutting-edge technology that impacts various sectors including mobile, AI, and automotive industries. The position combines technical leadership with hands-on verification work, making it ideal for someone looking to advance their career in hardware verification at a global semiconductor leader.

Last updated 5 hours ago

Responsibilities For DSP / NPU Design Verification Sr lead Engineer

  • Drive design verification of DSP IP by working with a global DSP design team
  • Implement and improve System Verilog/UVM Testbench Architecture
  • Develop and deploy new verification methodologies and automation
  • Develop design test plans and verification environments
  • Debug IP level, Subsystem and SoC level fails and bugs
  • Complete verification activities at IP level
  • Perform gate level simulation and verification
  • Conduct power aware RTL verification

Requirements For DSP / NPU Design Verification Sr lead Engineer

Python
  • 5-8 years experience in processor/ASIC design verification
  • Solid background in Digital Design, Processor Architecture, and Power aware verification
  • Expertise in System Verilog Testbench Architecture
  • Experience in writing C based and assembly level testcases
  • Experience with System Verilog/UVM and simulators
  • Scripting skills in Perl, Python, Shell
  • Strong analytical and debugging skills
  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering or related field
  • Excellent interpersonal and communication skills

Benefits For DSP / NPU Design Verification Sr lead Engineer

Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Assistance
Education Budget
  • World-class health coverage for employees and dependents
  • Financial planning and future preparation programs
  • Emotional/mental health support
  • Wellbeing programs and resources
  • Continuous learning and development programs
  • Tuition reimbursement
  • Mentorship programs

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