Low Power ASIC Engineer (Next-Gen, High-Speed Memory Subsystem)

World leader in wireless ICs powering majority of 4G and 5G devices and the largest fabless semiconductor company globally.
$140,000 - $210,000
Embedded
Senior Software Engineer
In-Person
5,000+ Employees
4+ years of experience
AI · Automotive

Description For Low Power ASIC Engineer (Next-Gen, High-Speed Memory Subsystem)

Qualcomm, the world's leading wireless IC manufacturer and largest fabless semiconductor company, is seeking a Low Power ASIC Engineer for their next-generation high-speed memory subsystem team. This role focuses on developing cutting-edge solutions for mobile, automotive, compute, AI, and XR applications in sub-4nm process technology.

The position offers an exciting opportunity to work with state-of-the-art technology in a fast-paced environment, where you'll be responsible for critical power analysis and optimization of memory subsystem designs. You'll collaborate with cross-functional teams to deliver high-performance, energy-efficient solutions that power the next generation of electronic devices.

The ideal candidate will bring extensive experience in power analysis and optimization, using industry-standard tools like PowerArtist and PrimeTime PX. You'll be involved in all aspects of the ASIC development lifecycle, from architecture definition to final implementation, working alongside some of the industry's leading experts in semiconductor design.

Qualcomm offers an exceptional compensation package, including competitive base salary, annual bonuses, and equity grants. The company provides comprehensive benefits including health coverage, 401(k), continuing education support, and wellness programs. Located in San Diego, you'll be working at the heart of innovation in wireless technology, contributing to products that impact billions of users worldwide.

This role represents an excellent opportunity for experienced engineers looking to advance their careers in low-power ASIC design while working on cutting-edge technology that shapes the future of wireless communications, automotive systems, and artificial intelligence applications.

Last updated 4 minutes ago

Responsibilities For Low Power ASIC Engineer (Next-Gen, High-Speed Memory Subsystem)

  • Work with cross-functional teams to deliver high performance and low power designs
  • Identify key power use cases and work with verification team to create and simulate power tests
  • Analyze and estimate power using PowerArtist and PrimeTime PX
  • Project power numbers and establish budgets
  • Build power models based on pre-silicon power data
  • Propose and maintain power analysis optimization and modeling methodologies

Requirements For Low Power ASIC Engineer (Next-Gen, High-Speed Memory Subsystem)

Python
  • Extensive hands-on experience in power analysis, estimation, and optimization
  • Knowledge and experience with high performance and low power designs
  • Strong knowledge in ASIC/SoC design flows
  • Hands-on experience in writing scripts (Shell, Perl, Tcl, Python)
  • Bachelor's degree in Electrical Engineering, Computer Science, Computer Engineering, or related field
  • 4+ years of ASIC design experience with Bachelor's or 3+ years with Master's or 2+ years with PhD

Benefits For Low Power ASIC Engineer (Next-Gen, High-Speed Memory Subsystem)

Medical Insurance
401k
Equity
  • Competitive annual discretionary bonus program
  • Annual RSU grants
  • Comprehensive health coverage
  • Financial planning assistance
  • Educational support
  • Wellness programs

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