Memory Control Design Engineer

Qualcomm Technologies, Inc. is seeking a Memory Control Design Engineer to join their ASIC Design team in San Diego. This role focuses on developing next-generation high-speed DDR Controllers, working at the intersection of hardware and software engineering. The position offers an opportunity to work with cutting-edge memory technologies and contribute to products that power modern computing devices.

The role involves architecting and implementing memory controllers that interface with various processors (CPU, DSP, Multimedia) at speeds exceeding 1GHz. You'll be responsible for the complete design lifecycle - from architecture specification to RTL implementation and final silicon validation. This includes working with verification engineers to ensure high-quality designs and supporting debug efforts during chip integration.

Key technical aspects include DDR controller architectures, CPU/bus architectures (x86/ARM), and extensive work with hardware description languages and C/C++ modeling. The position requires strong skills in digital design, including synthesis, timing analysis, and physical design considerations.

Qualcomm offers a competitive compensation package including base salary ($115,600 - $173,400), annual bonus potential, and RSU grants. The company provides comprehensive benefits including medical coverage, 401k, and various wellness programs. This is an excellent opportunity for a mid-level engineer to work with industry-leading technology while developing expertise in memory subsystem design.

The ideal candidate will have at least 2 years of ASIC design experience and a strong educational background in engineering. You'll be joining a collaborative team environment where you can contribute to groundbreaking technologies that power next-generation mobile and computing devices.