Staff ASIC Design Verification Engineer
Description For Staff ASIC Design Verification Engineer
Qualcomm, a global leader in technology innovation, is seeking a Staff ASIC Design Verification Engineer to join their team in Bangalore. This role is part of Qualcomm's design verification team, focusing on verifying Digital Low Power IPs for cutting-edge products in 5G, AI/ML, compute, IOT, and automotive applications.
The position requires a seasoned professional with 8+ years of experience in ASIC design verification, combining deep technical expertise with strategic thinking. You'll be responsible for the complete design verification lifecycle, from system-level concept to tape out and post-silicon support. This includes functional verification, low power verification, gate simulation, and formal verification.
As a Staff Engineer, you'll work with cross-functional teams, including digital design, analog circuit design, and SoC integration teams. You'll be using advanced verification methodologies such as SystemVerilog/UVM and working with various ASIC simulation tools. The role offers exposure to cutting-edge technologies and the opportunity to work on projects that impact next-generation products.
Qualcomm offers comprehensive benefits including world-class health coverage, financial planning programs, continuous learning opportunities, and wellbeing support. The company fosters an innovative culture where employees can unlock their full potential while working alongside some of the industry's leading engineering and technology experts.
This is an excellent opportunity for someone passionate about hardware engineering and verification, offering the chance to work on transformative technologies while being supported by a company known for its technological breakthroughs and commitment to employee development.
Responsibilities For Staff ASIC Design Verification Engineer
- Define pre-silicon and post-silicon testplans based on design specs
- Architect and develop testbench using advanced verification methodology
- Author assertions in SVA, develop testcases, coverage models
- Debug and ensure coverage closure
- Work with digital design, analog circuit design, modeling, controller/subsystem, & SoC integration teams
- Complete IP level verification, integration into subsystem and SoC, and post-silicon validation
Requirements For Staff ASIC Design Verification Engineer
- Master's/Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
- 8+ years ASIC design verification or related work experience
- Knowledge of HVL methodology like SystemVerilog/UVM
- Experience with ASIC simulation/formal tools (VCS, Xcellium/NCsim, Modelsim/Questa, VCFormal, Jaspergold)
- Experience with Low power design verification, Formal verification and Gate level simulation
- Knowledge of standard protocols (Power Management Flows, PCIe, USB, MIPI, LPDDR)
- Experience in scripting languages (Python, or Perl)
Benefits For Staff ASIC Design Verification Engineer
- World-class health benefit coverage for employees and dependents
- Financial planning and security programs
- Emotional/mental strength and resilience support
- Wellbeing programs
- Continuous learning and development programs
- Tuition reimbursement
- Mentorship programs
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