High Performance DSP core Implementation Engineer, Sr Staff
Description For High Performance DSP core Implementation Engineer, Sr Staff
Qualcomm, a global leader in wireless technology innovation, is seeking a High Performance DSP core Implementation Engineer at the Senior Staff level in Bangalore. This role presents an exciting opportunity to lead a talented team in the implementation domain for Display Sub-System, focusing on complex project execution and technical innovation.
The position requires a seasoned professional with 9-13+ years of experience and deep expertise in Physical Synthesis and Synthesis methodologies. You'll be responsible for leading critical aspects of hardware implementation, including timing closure, power optimization, and constraint development. The role demands strong technical leadership, with hands-on experience in industry-standard tools like Synopsys DCG/Genus/Fusion Compiler and Cadence Conformal.
As a Senior Staff Engineer, you'll collaborate across multiple teams, driving best practices and ensuring smooth execution of complex projects. The role offers significant growth opportunities, including mentorship, continuous learning programs, and the chance to work with cutting-edge technology. Qualcomm provides comprehensive benefits, including world-class health coverage, financial planning support, and wellbeing programs.
This position is ideal for someone who combines technical expertise with leadership abilities, can handle multiple time-critical projects, and has a passion for innovation in hardware engineering. You'll be joining a company at the forefront of wireless technology innovation, working on projects that impact global technological advancement.
The role offers the opportunity to work with some of the industry's brightest minds while contributing to world-changing innovations. Qualcomm's supportive, inclusive culture encourages idea sharing and professional growth, making it an ideal environment for experienced engineers looking to take their careers to the next level.
Responsibilities For High Performance DSP core Implementation Engineer, Sr Staff
- Lead high performing team in implementation domain for Display Sub-System
- Handle multiple time-critical and complex project executions
- Synthesis, LEC, Low power checks, Memory BIST insertion, Constraints validation
- Development of signoff quality constraints and power intent constraints
- TCL script development and design analysis/debugging
- Work with Synopsys DCG/Genus/Fusion Compiler
- Handle Synopsys Prime Time including constraint development
- Work with Cadence Conformal LEC and Low Power including UPF development
Requirements For High Performance DSP core Implementation Engineer, Sr Staff
- Bachelor's or master's degree in engineering with 9-13+ Years of experience
- Strong understanding of Physical Synthesis and Synthesis methodologies
- Experience with timing constraints, STA, timing closure and pipelining
- Experience in timing closure for multi-clock domain designs
- Familiar with MCMM synthesis and optimization
- Understanding of low-power design implementation using UPF
- Experience with scripting languages (Perl/Python, TCL)
- Experience with power optimization flows
- Ability to work independently with design, DFT and PD team
- Experience with ECOs and formal verification
Benefits For High Performance DSP core Implementation Engineer, Sr Staff
- World-class health benefit coverage
- Financial future preparation programs
- Emotional/mental strength and resilience support
- Wellbeing programs
- Continuous learning and development programs
- Tuition reimbursement
- Mentorship programs
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