SoC Physical Design Engineer, Implementation

Google is seeking a SoC Physical Design Engineer to join their hardware team focused on developing custom silicon solutions for Google's direct-to-consumer products. This role combines technical expertise in physical design with the opportunity to shape next-generation hardware experiences. The position requires deep knowledge of ASIC design flows, synthesis tools, and physical implementation methodologies.

The ideal candidate will have strong experience in physical design, particularly with tools like Genus, Innovus, DC, and ICC. They'll work on implementing innovative methodology schemes to optimize Performance, Area and Power, while managing physical implementation for various partitions. The role involves collaboration with cross-functional teams and requires expertise in low power design implementation including UPF/CPF and multi-voltage domains.

This is an excellent opportunity for someone passionate about pushing the boundaries of hardware design at scale. The position offers competitive compensation including base salary, bonus, equity, and comprehensive benefits. The role is based in Mountain View, CA, and is part of Google's broader mission to develop cutting-edge hardware solutions that power their consumer products.

The successful candidate will contribute to Google's hardware innovation, working with state-of-the-art tools and methodologies while collaborating with world-class engineers. This role offers the chance to make a significant impact on products used by millions of people worldwide while working at one of the world's leading technology companies.